1. Field of the Invention
The present invention relates to a printed-wiring substrate having connection terminals, and more particularly, to a printed-wiring substrate having connection terminals on each of main and back faces thereof.
2. Description of the Related Art
Conventionally, a printed-wiring substrate having connection terminals on each of main and back faces thereof has been known. FIG. 11 shows an example of a printed-wiring substrate 101.
The printed-wiring substrate 101 generally has a plate-like shape, and has a main face 101A and a back face 101B. A large number of main-face-side connection terminals 103 are formed on the main face 101A; and a large number of back-face-side connection terminals 105 are formed on the back face 101B. An IC chip 111 indicated by a broken line in FIG. 11 can be mounted on the main face 101A by solder-bonding connection terminals 113 of the IC chip 111 to the main-face-side connection terminals 103. Similarly, a motherboard 121, indicated by a broken line in FIG. 11, can be connected to the back face 101B by solder-bonding connection terminals 123 of the motherboard 121 to the back-face-side connection terminals 105.
To prevent oxidation, each of the main-face-side connection terminals 103 of the printed-wiring substrate 101, which are formed of copper connection pads, is covered with an Ni plating layer having a thickness of about 3 to 7 μm, and is further covered with a thin Au plating layer having a thickness of about 0.05 μm.
The reason for thinning the Au plating layer is that if the Au plating layer is thick, an inter-metallic compound is produced when the main-face-side connection terminals 103 and the connection terminals 113 of the IC chip 111 are soldered together, resulting in deteriorated solderability and connection reliability. Specifically, during the solder-bonding process, Au—Sn, which is a hard and brittle inter-metallic compound, is produced at the interface between solder and the main-face-side connection terminals 103 due to diffusion of Au contained in the Au plating layer of the main-face-side connection terminals 103 and Sn contained in solder. This reduces the bonding strength between the printed-wiring substrate 101 and the IC chip 111. Accordingly, the Au plating layer is preferably rendered as thin as possible in order to solve the problem caused by production of an inter-metallic compound, to thereby enhance connection reliability with the main-face-side connection terminals 103.
Similarly, each of the back-face-side connection terminals 105 of the printed-wiring substrate 101, which are formed of copper connection pads, is covered with an Ni plating layer having a thickness of about 3 to 7 μm, and is further covered with a thin Au plating layer having a thickness of about 0.05 μm.
A printed-wiring substrate 201 as shown in FIG. 12 has recently been developed as an improvement of the above-described printed-wiring substrate 101.
In the printed-wiring substrate 201, main-face-side connection terminals 203 are formed on the main face 201A; and back-face-side connection terminals 205 are formed on the back face 201B. An IC chip 211 can be mounted on the main face 201A by solder-bonding connection terminals 213 of the IC chip 211 to the main-face-side connection terminals 203. Similarly, a motherboard 221 can be connected to the back face 201B not by means of solder, but through use of a socket or the like which establishes mechanical contact between connection terminals 223 of the motherboard 221 and the back-face-side connection terminals 205.
3. Problems to be Solved by the Invention
When the printed-wiring substrate 201 shown in FIG. 12 is used, the back-face-side connection terminals 205 are forcedly brought into contact with the connection terminals 223 of the motherboard 221, and the contact may cause exfoliation of the Au plating layer formed on the surfaces of the back-face-side connection terminals 205. In such a case, the Ni plating layer is exposed from portions at which the Au plating layer has exfoliated. This may result in problems such as an increase in the contact resistance between the back-face-side connection terminals 205 and the connection terminals 223 of the motherboard 221.